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ADT7467
Table 43. VOLTAG E READING REGISTERS (POWER-ON DEFAULT = 0X00) (Note 1)
Register Address
0x21
0x22
R/W
Read Only
Read Only
Description
Reflects the Voltage Measurement (Note 2) at the V CCP Input on Pin 14 (8 MSBs of Reading)
Reflects the Voltage Measurement (Note 3) at the V CC Input on Pin 3 (8 MSBs of Reading)
1. If the extended resolution bits of these readings are also being read, the extended resolution registers (0x76, 0x77) must be read first. Once
the extended resolution registers have been read, the associated MSB reading registers are frozen until read. Both the extended resolution
registers and the MSB registers are frozen.
2. If V CCP LO (Bit 1 of the Dynamic T MIN Control Register 1, 0x36) is set, V CCP can control the sleep state of the ADT7467.
3. V CC (Pin 3) is the supply voltage for the ADT7467.
Table 44. TEMPERATURE READING REGISTERS (POWER-ON DEFAULT = 0X01) (Notes 1, 2)
Register Address
0x25
0x26
0x27
R/W
Read Only
Read Only
Read Only
Description
Remote 1 Temperature Reading (Notes 3, 4) (8 MSBs of Reading)
Local Temperature Reading (8 MSBs of Reading)
Remote 2 Temperature Reading (8 MSBs of Reading)
1. These temperature readings can be in twos complement or Offset 64 format; this interpretation is determined by Bit 0 of Configuration
Register 5 (0x7C).
2. If the extended resolution bits of these readings are also being read, the extended resolution registers (0x76, 0x77) must be read first. Once
the extended resolution registers have been read, all associated MSB reading registers are frozen until read. Both the extended resolution
registers and the MSB registers are frozen.
3. In twos complement mode, a temperature reading of ? 128 ? C (0x80) indicates a diode fault (open or short) on that channel.
4. In Offset 64 mode, a temperature reading of ? 64 ? C (0x00) indicates a diode fault (open or short) on that channel.
Table 45. FAN TACHOMETER READING REGISTERS (POWER-ON DEFAULT = 0X00) (Note 1)
Register Address
0x28
0x29
0x2A
0x2B
0x2C
0x2D
0x2E
0x2F
R/W
Read Only
Read Only
Read Only
Read Only
Read Only
Read Only
Read Only
Read Only
Description
TACH1 Low Byte
TACH1 High Byte
TACH2 Low Byte
TACH2 High Byte
TACH3 Low Byte
TACH3 High Byte
TACH4 Low Byte
TACH4 High Byte
1. These registers count the number of 11.11 m s periods (based on an internal 90 kHz clock) that occur between a number of consecutive fan
TACH pulses (default = 2). The number of TACH pulses used to count can be changed using the TACH pulses per revolution register (0x7B).
This allows the fan speed to be accurately measured. Because a valid fan tachometer reading requires that two bytes are read, the low byte
must be read first. Both the low and high bytes are then frozen until read. At power-on, these registers contain 0x0000 until the first valid
fan TACH measurement is read into these registers. This prevents false interrupts from occurring while the fans are spinning up.
A count of 0xFFFF indicates that a fan is one of the following:
? Stalled or blocked (object jamming the fan).
? Failed (internal circuitry destroyed).
? Not populated. (The ADT7467 expects to see a fan connected to each TACH. If a fan is not connected to a TACH,
the minimum high and low bytes of that TACH should be set to 0xFFFF.)
? Alternate function (for example, TACH4 reconfigured as THERM pin).
? 2-wire instead of 3-wire fan.
Table 46. CURREN T PWM DUTY CYCLE REGISTERS (POWER-ON DEFAULT = 0X00) (Note 1)
Register Address
0x30
0x31
0x32
R/W
Read/Write
Read/Write
Read/Write
Description
PWM1 Current Duty Cycle (0% to 100% Duty Cycle = 0x00 to 0xFF)
PWM2 Current Duty Cycle (0% to 100% Duty Cycle = 0x00 to 0xFF)
PWM3 Current Duty Cycle (0% to 100% Duty Cycle = 0x00 to 0xFF)
1. These registers reflect the PWM duty cycle driving each fan at any given time. When in automatic fan speed control mode, the ADT7467
reports the PWM duty cycles through these registers. The PWM duty cycle values vary according to the temperature in automatic fan speed
control mode. During fan startup, these registers report 0x00. In software mode, the PWM duty cycle outputs can be set to any duty cycle
value by writing to these registers.
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